Semiconductor device fabrication is the process used to create integrated circuits that are present in electrical and electronic devices. The fabrication process includes a sequence of photographic and chemical processing steps during which electronic circuits are gradually created on a substrate made of semiconductor materials. A typical substrate is made out of silicon, and is sliced and polished to obtain a regular and flat surface.
Once the substrate is prepared, many process steps are necessary to produce the desired semiconductor integrated circuit. Such steps can be grouped into two major parts: Front End Of Line (FEOL) processing and Back End Of Line (BEOL) processing. FEOL processing refers to the formation of the transistors directly in the silicon. In FEOL processing, a semiconductor substrate is developed by the growth of an ultrapure, virtually defect-free silicon layer through epitaxy. Additional steps performed in the FEOL process include: growth of the gate dielectric (traditionally silicon dioxide), patterning of the gate, patterning of the source and drain regions, and subsequent implantation or diffusion of dopants to obtain the desired complementary electrical properties.
Patterning refers to a series of steps that form or alter the existing shape of the deposited materials on the substrate. During patterning, the substrate is coated with a layer of photoresist. The photoresist is then exposed to a pattern of intense light, and the areas of the photoresist that are exposed to the intense light become soluble in a developer solution. A layer of anti-reflective coating may be utilized to reduce reflections during the exposure. The anti-reflective coating may be located at the bottom of the photoresist, and may be referred to as the bottom anti-reflective coating (BARC) layer. After the exposure, the developer solution is utilized to remove the exposed photoresist, and the remaining photoresist is solidified to form a protection for the underlying substrate during etching.
Etching refers to a step of utilizing chemical agents to remove the uppermost layer of the substrate in the areas that are not protected by the remaining photoresist. Upon completion of the etching process, the remaining photoresist and anti-reflective coating are no longer needed and must be removed from the substrate. The photoresist may be removed utilizing plasma ashing, in which a plasma containing oxygen is used to oxidize the photoresist. Deionized (DI) water may be used subsequently for DI water cleaning. However, plasma ashing processes may damage refractory gate metals such as TiN, TaN and high-k dielectrics such as HfO2 or HfSiOx. Furthermore, removal of the photoresist may be difficult in areas that have been exposed to electron beam (ebeam) bombardment as a result of polymer cross-linking (e.g., if the substrate has been exposed to a post-lithography critical dimension scanning electron microscopy (CDSEM) metrology step and has been exposed to localized areas of ebeam dosing).
Alternatively, a liquid photoresist removing solvent may be utilized to chemically alter the photoresist so that it no longer adheres to the substrate. Such removal processes are referred to as wet processes. However, a requirement for a reduction in the environmental safety and health (ESH) impact of such solvents has changed. For instance, N-methyl-pyrrolidone (NMP), solvent used in photoresist and BARC removal, could be classified as reprotoxic.